CXL Is the Next HBM: How Samsung Is Opening the Era of Shared Memory

When we talk about memory in the AI era, the first thing that usually comes to mind is HBM—the high-bandwidth memory stacked next to GPUs that has powered the recent boom in large-scale AI computing.

The past few years of AI acceleration have essentially been an “HBM boom.” But a new development suggests that a second pillar of AI memory is finally moving into the mainstream.

That pillar is CXL memory (CXL DRAM).

According to Korean media, Samsung completed preparation for mass production of CXL 2.0-based CMM-D 2.0 in the first half of 2025, and entered full-scale mass production during November, 2025.

This is not a small sample-testing phase. It is a declaration that the product is ready to be deployed directly into real customer servers and data-center environments.

At the same time, Samsung revealed plans to release, within the same year, the industry’s first CXL 3.1-based CMM-D 3.0, offering up to 1 TB of capacity and 72 GB/s of bandwidth.

Why does CXL deserve to be called the “next HBM”?

The explanation is straightforward. Until now, CPUs, GPUs, and AI accelerators each carried their own dedicated memory. They operated in isolated memory islands.

CXL breaks these barriers. Through a single CXL interface, a CPU can borrow GPU memory, a GPU can access CPU memory directly, and the entire system can behave as if it is sharing one large pooled memory space.

If HBM represents a memory innovation centered on speed and bandwidth, CXL represents a memory innovation centered on scalability and efficiency.

As AI models grow larger—into the hundreds of billions or even trillions of parameters—the first problem every operator encounters is, “I don’t have enough memory to load this model.”

Traditionally, solving this required replacing whole servers, or adding DIMMs until the chassis reached its physical limit.

In a CXL-based server, the approach changes entirely. Memory can be expanded and allocated on demand, in real time, according to workload requirements. The result is faster data processing and improved energy efficiency.

What makes this milestone even more interesting is that Samsung did not enter this market suddenly. The company had been preparing long before anyone expected a real CXL market to exist.

Samsung introduced the world’s first CXL DRAM prototype in 2021, and in 2022 collaborated with Intel to unveil a CXL 2.0–compatible sample. At the time, the technology existed, but server platforms and software ecosystems capable of using it did not.

In short, the market had technology but no customers.

The situation today is very different. NVIDIA’s GPU clusters continue to expand aggressively. HBM demand is exceeding supply. At the same time, operators are rethinking their entire memory hierarchy for large-scale AI.

Exactly at this moment, Samsung announced customer acquisition + mass production together. This combination is a classic signal that a dormant technology is now entering true commercialization.

The competitive implications are significant. HBM is a field where only a few vendors—with deep packaging capabilities and tight alignment with GPU companies—can participate meaningfully.

CXL, by contrast, is built on an open interface standard, which allows a wide range of participants: memory vendors, CPU/GPU providers, module makers, cloud providers, and server OEMs.

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SK Hynix and Micron Reaction?

SK Hynix has stated publicly that CXL will be a key part of its AI memory portfolio, alongside DDR6, LPDDR6, HBM, and the emerging HBF (High-Bandwidth Flash). Its roadmap positions CXL memory expanders for major commercialization between 2026 and 2028.

Meanwhile, Micron has released its CZ120 and CZ122 CXL 2.0 memory expansion modules (128 GB and 256 GB), and has demonstrated operational integration with Intel Xeon platforms and CXL fabrics in real data-center scenarios.

Samsung’s decision to enter volume production now acts as a catalyst that will likely accelerate all competitors’ schedules.

Looking at the market more broadly, 2024 marks the point when CXL 2.0 products entered early commercialization.

At this juncture, AI Strategica revised the forecasting: the CXL controller market will grow from about USD 1.5 billion in 2022 to USD 5.8 billion by 2030, with an annual growth rate around 21%.

The overall data-center DRAM market is expected to grow from USD 5.7 billion in 2024 to over USD 11.4 billion by 2031.

While the CXL-specific portion is still small today, its growth rate and architectural importance position it as a strategic lever technology in the AI memory hierarchy.

The message underlying recent developments is clear: if HBM has led the “speed war” of the AI era, CXL is about to lead the “memory-structure war.”

Samsung’s public confirmation of mass production signals which company fired the opening shot of that structural transformation.

The question now becomes: in the future memory hierarchy, traditionally defined as HBM + DRAM, how quickly will the industry shift toward HBM + DRAM + CXL pooled memory?

And perhaps more importantly, who will lead that transformation?

Competitive Roadmap Comparison: Samsung vs. SK Hynix vs. Micron

Samsung

• CMM-D 2.0
  • CXL 2.0, 128/256 GB
  • PCIe Gen5 x8, ~36 GB/s
  • Mass-production readiness in early 2025; full-scale production starting in the second half
• CMM-D 3.0 / CXL 3.1
  • Up to 1 TB, 72 GB/s
  • PCIe Gen6, dual DDR5 channels
  • Design-in and sampling targeted for late 2025

SK Hynix

• CXL positioned as a core part of its AI-memory stack (DDR6, LPDDR6, HBM, HBF, CXL).
• Roadmap places CXL memory expanders in the 2026–2028 commercialization window.
• Less detail revealed than Samsung, but aiming to create a full-stack AI memory offering.

Micron

• CZ120 / CZ122 (CXL 2.0)
  • 128 GB / 256 GB modules
  • Real-world demonstrations with Intel Xeon platforms
• Focus on platform-level integration, CXL fabric demonstrations, and memory lake concepts for data centers.
• More emphasis on ecosystem and PoC deployments than on large-capacity CXL 3.x modules.

Summary Table

Source: AI Strategica

CXL Market Scale & Outlook

Although precise numbers for “CXL DRAM-only” markets are not yet available, adjacent indicators provide a reliable view of its trajectory.

Source: AI Strategica

The key insight is not the raw numbers, but the growth rate and the architectural leverage CXL introduces. This technology is not merely an add-on; it reshapes how AI infrastructure will be built going forward.

Strategic Implications for Global Stakeholders

1. CXL unlocks the next ceiling in AI memory scaling
   HBM alone cannot solve the memory-capacity crisis in large-scale AI models. A combined HBM + CXL pooled memory design becomes a natural next step for multi-trillion-parameter workloads.
2. Open-interface memory vs. vertically controlled ecosystems
   CXL’s open standard allows broader participation—from CPU vendors to cloud operators—making it a counterbalance to vertically integrated GPU-HBM ecosystems.
3. Memory vendors will diverge in strategic positioning
   • Samsung: full-stack memory & storage infrastructure
   • SK Hynix: AI-optimized memory specialist
   • Micron: platform & ecosystem integrator
4. Data-center economics will shift
   Instead of scaling performance by buying more GPUs, future architectures will scale via memory fabrics and CXL expansion, altering capex logic for hyperscalers.

Critical Questions

AI Strategica conducted a global expert survey to gather strategic insights and reflections on this question, and published the findings and their implications in its CoreBrief.  Please ask the report purchase at Contact@AIStrategica.com

1. Where in our AI infrastructure roadmap will we embed CXL—alongside HBM, or as a new baseline tier?
   This determines how scalable and future-proof the next generation of AI clusters will be.
2. How will our total cost of ownership (TCO) change if we scale memory through CXL rather than replacing servers or adding GPUs?
   This requires a 3–5-year ROI calculation including power, cooling, and licensing.
3. How should we redesign the memory hierarchy—HBM, DRAM, CXL DRAM, and CXL-attached flash—to support next-generation AI workloads?
   The previous DRAM-vs-SSD dichotomy is no longer valid.
4. Will CXL be a simple component we adopt, or the core of a new platform strategy involving fabrics, software, and system architecture?
   This choice determines competitiveness in the next decade of AI infrastructure.

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